منابع مشابه
Registers
Consider a system of asynchronous processes that communicate among themselves by only executing read and write operations on a set of shared variables (also known as shared registers). The system has no global clock or other synchronization primitives. Every shared variable is associated with a process (called owner) which writes it and the other processes may read it. An execution of a write (...
متن کاملShift Registers
A homomorphism of the de Bruijn graph that maps a graph of order n onto one of order n -1 and its applications to the design of nonsingular feedback shift registers are discussed. The properties preserved under this mapping suggest a new design technique whose main advantage is due to the fact that the problem of designing a desired n-stage shift register may be reduced to a problem of order n ...
متن کاملAlgebraic Feedback Shift Registers
A general framework for the design of feedback registers based on algebra over complete rings is described. These registers generalize linear feedback shift registers and feedback with carry shift registers. Basic properties of the output sequences are studied: relations to the algebra of the underlying ring; synthesis of the register from the sequence (which has implications for cryptanalysis)...
متن کاملWeak Read/Write Registers
In [14], Lamport has defined three classes of shared registers which support read and write operations, called —safe, regular and atomic—depending on their properties when several reads and/or writes are executed concurrently. We consider generalizations of Lamport’s notions, called k-safe, k-regular and k-atomic. First, we provide constructions for implementing 1-atomic registers (the stronges...
متن کاملVirtual-Physical Registers
A novel dynamic register renaming approach is proposed in this work. The key idea of the novel scheme is to delay the allocation of physical registers until a late stage in the pipeline, instead of doing it in the decode stage as conventional schemes do. In this way, the register pressure is reduced and the processor can exploit more instruction-level parallelism. Delaying the allocation of phy...
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ژورنال
عنوان ژورنال: Transactions of the Royal Asiatic Society of Great Britain and Ireland
سال: 1830
ISSN: 0950-4737,2051-2058
DOI: 10.1017/s0950473700000598